 | Author | Message | | | elicoco | | Posted: Mon Nov 17, 2008 1:42 am Post subject: IS41LV85120A datasheet and pdf | | | | Joined: 15 Jul 2008 Posts: 41 | FEATURES
• TTL compatible inputs and outputs• Refresh Interval: 1024 cycles/16 ms
• Refresh Mode : RAS-Only, CAS-before-RAS (CBR),and Hidden• JEDEC standard pinout• Single power supply 5V ± 10% (IS41C85120A) 3.3V ± 10% (IS41LV85120A)• Lead-free available
DESCRIPTION
The ISSI and IS41LV85120A are 524,288 x 8-bit high-performance CMOS Dynamic Random AccessMemory. Both products offer accelerated cycle access EDOPage Mode. EDO Page Mode allows 512 random accesseswithin a single row with access cycle time as short as 10ns per8-bit word. The Byte Write control, of upper and lower byte,makes the IS41C85120A and IS41LV85120A ideal for use in16 and 32-bit wide data bus systems.These features make the IS41C85120A and IS41LV85120Aideally suited for high band-width graphics, digital signal
processing, high-performance computing systems, and periph-eral applications.The IS41C85120A and IS41LV85120A are available in a28-pin, 400-mil SOJ package.
http://www.chinaicmart.com/series-IS4/IS41LV44052.html | |
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