 | Author | Message | < Programmer ~ IS41LV44052 IS41C8200 IS41LV4405X SERIES datasheet | | jojolucky | | Posted: Thu Oct 30, 2008 2:20 am Post subject: IS41LV44052 IS41C8200 IS41LV4405X SERIES datasheet | | | | Joined: 12 Apr 2008 Posts: 290 | IS41LV44052 IS41C8200 IS41LV4405X SERIES datasheet more detail check from
[b]http://www.chinaicmart.com/series-IS4/IS41LV44052.html
IS41C85120A
IS41LV85120A
512K x 8 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
FEATURES[/b]
• TTL compatible inputs and outputs
• Refresh Interval: 1024 cycles/16 ms
• Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden
• JEDEC standard pinout
• Single power supply
5V ± 10% (IS41C85120A)
3.3V ± 10% (IS41LV85120A)
• Lead-free available
DESCRIPTION
The ISSI IS41C85120A and IS41LV85120A are 524,288 x 8-bit high-performance CMOS Dynamic Random Access Memory. Both products offer accelerated cycle access EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 8-bit word. The Byte Write control, of upper and lower byte, makes the IS41C85120A and IS41LV85120A ideal for use in 16 and 32-bit wide data bus systems.
These features make the IS41C85120A and IS41LV85120A ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IS41C85120A and IS41LV85120A are available in a 28-pin, 400-mil SOJ package. | |
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